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Microchip Technology Microsemi UG0677 - Adding Physical Constraints Using Libero

Microchip Technology Microsemi UG0677
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Implementation
Microsemi Proprietary and Confidential UG0677 User Guide Revision 9.0 104
4.4.2.1 DFE Coefficients
DFE Calibration of the DFE Coefficients is not be performed in Static DFE. See DFE Calibration,
page 12.
To set the required registers with static values, users must enhance the “set_io” PDC command to add
new attributes. The new attributes that need to be added are highlighted in the below PDC command.
PDC command example:
set_io -port_name LANE0_RXD_N \
-RX_DFE_COEFFICIENT_H1 20 \
-RX_DFE_COEFFICIENT_H2 20 \
-RX_DFE_COEFFICIENT_H3 20 \
-RX_DFE_COEFFICIENT_H4 20 \
-RX_DFE_COEFFICIENT_H5 20 \
-DIRECTION INPUT
The RX_DFE_COEFFICIENT attributes are optional (applied only when Static calibration is selected).
These attributes take integer values between 0 and 15. The corresponding register fields are 5 bits wide
in all cases with the MSB bit reserved for sign bit.
4.5 Adding Physical Constraints Using Libero
The transceiver I/O pin assignments can be made with PDC commands and passed as physical design
constraints to the physical layout tool. The I/O PDC constraints (for XCVR LANE RX pins, TX pins, and
XCVR_REF_CLK pins) must be specified in an I/O PDC file. The chip plan location constraints for TXPLL
must be specified in a floor plan PDC file. The PolarFire I/O Editor provides a GUI tool designed to make
I/O pin assignments graphically and user-friendly, as an easy alternative to writing PDC commands.
When the pin assignment is committed and saved in the Pin Planner, a PDC file is created. This PDC file
can then be passed to the Place and Route tool as a physical design constraint.

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