Functional Description
Microsemi Proprietary and Confidential UG0677 User Guide Revision 9.0 16
3.2 Enhanced Receiver Management
Enhanced receiver management (ERM) is implemented in FPGA logic inside the XCVR component. The
ERM adds DFE/CDR calibration management, and lock-to-data lock detection capabilities of the
PF_XCVR. The RTL is autonomously generated by Libero Software. The generated blocks manage the
start-up/on-demand CDR/DFE calibration and fine-grain lock detector with a PMA, 8b10b, and 64b6xb
modes of the PF_XCVR. The ERM allows the Rx Lock detection logic to handle advanced capabilities of
Delayed Traffic and Cable Pull during operation without further interaction from other user logic.
The enhanced receiver management feature provides the following functions.
• Manages receiver lock-to-reference versus lock-to-data operation modes of PF_XCVR.
• Manages receiver calibration (see Receiver Calibration, page 12).
• Provides optional automatic calibration upon determining first valid receiver bit-lock.
• Provides optional support for on-demand requested calibration.
• Provides optional support for Data Eye clock centering recalibration.
• Provides optional support for DFE Coefficient recalibration.
• Provides indicator when receiver completes calibration.
• Provides LANEx_LOS input, which may be asserted as a means of holding lock management in
lock-to-reference. This is useful when interfacing to an optical interface, which provides a loss-of-
signal indicator such as SFP.
Enhanced receiver management is recommended to optionally improve the link management for data
rates above 5 Gbps but can be used to improve link reliability with lower data rates while using the
automatic calibration features of ERM. Enhanced receiver management is not included for PCI Express,
PIPE, or Burst Mode Receiver solutions of PF_XCVR when generated by Libero software. Generally, the
advanced features from ERM are already managed by these protocol layers.
ERM is utilized to augment the Rx_IDLE peak detector logic which is only valid for a limited minimum
density of transitions on the Rx data or high bit rates. Other lower density patterns such as SDI at 270
Mb/s or 10G-KR Auto-negotiation data are a good examples of data patterns that cannot use the peak
detector and thus other system-dependent methods to keep the Rx PLL in lock-to-reference mode in the
absence of incoming data are required.
For example, some protocols such as 10GBASE-KR and PCI-Express, exchange specific training
patterns to establish and tune the respective links. These protocols does not use the ERM as it can
interfere with these kinds of negotiation operations. Other applications such as CPRI goes through a
sophisticated process by stepping through multiple data rates during its startup. The ERM should not be
used in this type of application. ERM should also not be used with Rx-only modes such as DisplayPort
where the RxPLL is locked to a lower rate data stream.
ERM can be used with JESD204b, Interlaken, and fixed rate CPRI applications.
The ERM functionality extends capabilities for transceiver applications for all PolarFire devices excluding
the MPF300XT device. The ERM uses minimal logic resources, but does extend the lock time of the
CDR by approximately three times versus when the ERM is not included.
The ERM ports are exposed by the transceiver configurator dependent on the selected calibration when
enabled (default) in the GUI (see Figure 8, page 17). The following table lists the ports required or used
in conjunction with the ERM module.
Table 4 • ERM Ports
Name Direction Description
CTRL_CLK Input 40 MHz clock for the enhanced receiver management logic. The CTRL_CLK
input clock can be sourced from the divided output of the PF_OSC
(RCOSC_160MHZ_CLK_DIV).
CTRL_ARST_N Input Input signal needed to reset ERM. User should drive this input from the
XCVR_INIT_DONE signal of the PF_INIT_MONITOR component.
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