Microchip Technology Microsemi UG0677 - PMA and PCS Resets; Figure 54 PMA_ARST_N Block Diagram

Functional Description
Microsemi Proprietary and Confidential UG0677 User Guide Revision 9.0 73
3.6 PMA and PCS Resets
The PolarFire transceiver uses partitioned resets, one single wire for PMA_ARST_N and one for
PCS_ARST_N to the PF_XCVR. Specifically, these two inputs can come from the FPGA fabric to reset
the PMA and PCS portions of the transceiver. Both inputs assert the reset asynchronously and de-
assertion is internally synchronized.
PMA_ARST_N reset always impacts both the Rx and Tx. This active low input resets all internal portions
of the transceiver PMA including the serializer/deserializer, DFE, eye monitor, loopback FIFO, and
internal analog circuits. The following figure shows the block diagram of PMA_ARST_N.
Figure 54 • PMA_ARST_N Block Diagram
Control registers are available to selectively reset all components within the PMA and TXPLLs. These
registers can be accessed through DRI (see Dynamic Reconfiguration Interface, page 124). For
information about the register map, see PolarFire Device Register Map.
PCS_ARST_N reset impacts either or both the receiver and the transmitter portion of PCS depending on
transceiver mode (see Transceiver Modes, page 99). Resetting the Tx causes the serial link to be void of
data toggling while internally restarting and the PCS transmit data path flushes out. Resetting the Rx
causes the PCS active mode circuitry to be restarted. In 8b10b PCS mode, PCS_ARSTN is used to force
the symbol alignment to restart when too many data errors are seen in the fabric logic. PCS_ARSTN
causes the RX clocks to stop. Users should not assert/de-assert the PCS_ARSTN reset via logic that is
driven from the RX clocks as this would then create a lock-up situation where the PCS Reset is never de-
asserted because the Rx clock stops to toggle.