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Microchip Technology Microsemi UG0677 - Jesd204 B; Interface; Figure 103 Connectivity between Polarfire Device and JESD204 B Interface; Figure 104 Connectivity between Polarfire Device to SFP+ Interface

Microchip Technology Microsemi UG0677
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Board Design Recommendations
Microsemi Proprietary and Confidential UG0677 User Guide Revision 9.0 128
Note: The ceramic 0201 and 0402 AC coupled capacitors are preferred for PolarFire FPGA transceivers.
The transmitter must have AC coupling capacitors.
8.2.2 JESD204B
JESD204B version increases the supported lane data rates to 12.5 Gbps and divides devices into three
different speed grades. The source and load impedance is the same for all three speed grades being
defined as 100 . The first speed grade aligns with the lane data rates from the JESD204 and
JESD204A versions of the standard, and defines the electrical interface for lane data rates up to
3.125 Gbps. The second speed grade in JESD204B defines the electrical interface for lane data rates up
to 6.375 Gbps. This speed grade lowers the minimum differential voltage level to 400 mV peak-to-peak,
down from 500 mV peak-to-peak for the first speed grade. The third speed grade in JESD204B defines
the electrical interface for lane data rates up to 12.5 Gbps.
The following figure shows the connectivity between the PolarFire device and the JESD204B interface.
Figure 103 • Connectivity Between PolarFire Device and JESD204B Interface
8.3 10G Interface
The following figure shows the connection between PolarFire FPGA and SFP+ interface.
Figure 104 • Connectivity Between PolarFire Device to SFP+ Interface
PolarFire FPGA JESD204B Interface
156.25 MHz
Oscillator
LVDS
XCVR_x_TXy_P
XCVR_x_TXy_N
XCVR_x_RXy_P
XCVR_x_RXy_N
XCVR_xy_REFCLK_P
XCVR_xy_REFCLK_N
x refers to transceiver number 0, 1, 2, and 3
y refers to lane number 0, 1, 2, and 3
Xy refers to location
XCVR_x_TXy_P
XCVR_x_TXy_N
XCVR_x_RXy_P
XCVR_x_RXy_N
XCVR_xy_REFCLK_P
XCVR_xy_REFCLK_N
0.1 μF
0.1 μF
PolarFire FPGA
SFP + CONN
156.25 MHz
Oscillator
XCVR_x_Txy_P
XCVR_x_Txy_N
XCVR_x_Rxy_P
XCVR_x_Rxy_N
XCVR_xy_REFCLK_P
XCVR_xy_REFCLK_N

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