Microchip Technology Microsemi UG0677 - Transceiver Initialization; Transceiver Initialization Data

Implementation
Microsemi Proprietary and Confidential UG0677 User Guide Revision 9.0 107
4.6 Transceiver Initialization
The transceiver is initialized after the user customizes the transceiver or PCIe features with the
associated configurators. The transceiver initialization data refers to the memory files and the
initialization clients required for the three stages of initialization that is executed by the device at start-up.
For proper functioning, the user design must generate initialization data before programming (running
Generate Bitstream or the Export Programming File, Export Programming Job, Export Programming Job
Data, Export SmartDebug Job Data, Generate SPI Flash Image, Generate SPI Flash Image, and Export
SPI Flash Image).
The operations of Configuration and Generation are separated into two individual design flow steps
called Configure Design Initialization Data and Memories and Generate Design Initialization Data.
Invoking the Configure Design Initialization Data and Memories opens up the initialization UI.
Clicking Apply in the Design Initialization tab only saves the configuration for initialization data, it does
not generate the initialization data.
For design with transceivers, the Libero software automatically incorporates the required initialization
data into the design project without any manual steps by the user. With transceiver designs, there are
instances where a custom configuration file is used for cases not directly supported by Libero SoC. In
these rare instances, the custom configuration file is used to compile the design to initialize the
transceiver components. XCVR configuration data present in the design is initialized during power-up
using initialization clients placed in the non-volatile sNVM memory. Initialization data is generated and
stored in binary (*.mem) file of the second stage client, which initializes the TXPLL, PCIe and XCVR
blocks present in the design.
The programming steps (Generate Bitstream and the Export steps Export Programming File, Export
Programming Job, Export Programming Job Data, Export SmartDebug Job Data and Export SPI Flash
Image) depend on the Generate Design Initialization Data. Libero automatically runs the Generate
Design Initialization Data, if it is not already in pass state, when any of these programming steps are run.
This ensures that initialization data is always present and up-to-date before programming.
4.6.1 Transceiver Initialization Data
After completion of the Libero SoC customization, the XCVR, PCIe, TxPLL, and CCCs are autonomously
configured and initialized during the design generation. The register customization can be reviewed in a
report generated during the Generate Design Initialization Data step within Libero SoC.
A "configuration Report for SERDES XCVR, PCIe, CC, Transmit PLL" is generated that records the value
in the related registers. The report is located in the
project\designer\impl\Design_Initialization_Data_report.xml.