Functional Description
Microsemi Proprietary and Confidential UG0677 User Guide Revision 9.0 22
Figure 15 • On-Demand Calibration Waveform
Note: At any time when the Rx PLL is not locked: Once a contiguous Rx data stream of > 25 us occurs, no
transmit data gaps of non-standard-compliant data of > 5000 UI are allowed until LANE#_RX_VAL = 1.
All non-compliant data gaps of any length must be followed by 5000 UI of compliant data until
LANE#_RX_VAL = 1. If a violation to this requirement is seen, receiver calibration may not occur
properly and the PolarFire device may require the DRI bus to command a register access to cycle the
PMA_LANE\DES_RSTPD\RXPD = 1'b1 -> 1'b0 in order to continue operating correctly. Assertion of
PMA_ARST should occur at approximately the same time as the RXPD=1 is written via DRI. Then hold
RXPD=1 for 5 us before writing RXPD=0 followed by deassertion of PMA_ARST. For DRI specific
information, see the PolarFire Device Register Map. This scenario can also be controlled by using the
LANE#_LOS input to hold off ERM startup until the RX data stream is properly settled.
The ERM can be optionally not included at design creation using the Libero transceiver configurator.
Transceiver designs that do not include the ERM have to manage the before mentioned considerations
and should only be not used after carefully understanding the system requirements. Without the ERM,
the transceiver LANEx_RX_READY pin may toggle when the Rx signal is open or disconnected, or while
an out-of-range condition occurs. For example, incorrect Rx serial data rates, with serial input data
>1.17% away, is considered out of range. Initially, the Rx CDR lock may not lock with missing or bad data
stream. The following conditions prevent the incorrect behavior.
• The Rx data rate is <±300 ppm of the Libero configured rate.
• Rx data is present when PMA_ARST is de-asserted.
• Data stream must not stop once locked or the CDR Lock circuitry may not properly indicate the
status of the CDR.
• PMA_ARST can be used to restart with any data stream disruptions.
LANE#_RXD[P-N]
LANE#_RX_IDLE
CDR Status(Internal)
LTD
LANE#_CALIBRATING
LANE#_RX_READY
(Rx Fine Lock)
LANE#_RX_VAL
(Note1)
LANE#_CALIB_REQ
1
1- 10 seconds
** Incoming signal must be appropriate for calibration
** Hold Calib_Req until Calibrating==1 or RX_VAL rises
Glitches on RX_IDLE is expected for incoming traffic > 5Gbps
Calibration
Done
LTD= Lock to Data
Note 1- starting state of LANE#_RX_VAL might be 0 or 1
LANE#_RX_READY_CDR
LANE#_RX_READY_CDR
may toggle during calibration
LANE#_LOS
Do Not Care
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