Functional Description
Microsemi Proprietary and Confidential UG0677 User Guide Revision 9.0 56
Q#_TXPLL_SSC: This PLL operates in the 1.6 GHz – 6.4 GHz frequency range and can provide a
transmit bit clock to a transceiver quad. The TxPLL_SSC supports jitter attenuation for loop-time
applications. Unique to this PLL is the spread-spectrum clocking (SSC) generation support, which can
generate a saw-tooth clock with various options.
For each quad, there is one TxPLL_SSC that can only be used by lanes within that quad.
Q#_TXPLLn: There are two of these PLLs within the transceiver quad location, TxPLL0 and TxPLL1.
This type of PLL also supports the full 1.6 GHz – 6.4 GHz frequency range and can drive the transmit bit
clock pair of adjacent transmit lanes both above and below the PLL. This PLL also supports jitter
attenuation, but does not provide SSC support. There are also transmit PLLs, which can be used by the
local transceiver quad and in a subset of lanes of adjacent quads. See Figure 52, page 71 and Figure 53,
page 72 for more information on TxPLL sharing.
Note: Both types of TxPLLs accept spread-spectrum input.
The jitter attenuation feature uses digital filtering within the transmit PLL to remove the unwanted noise of
a reference clock across a wide frequency band. The low-jitter output is sent to an oscillator that is
numerically controlled to adjust the phase and frequency relationships to achieve a 0 ppm offset from the
original noisy reference clock.
Table 17 • Transmit PLL
PLL Type Rate Details
Q#_TXPLL_SSC
1
1. Q# = Transceiver quad identifier (Q0, Q1, and so on.)
1.6 GHz–6.4 GHz PLL is used within the quad only. This PLL supports jitter attenuation and
SSC.
Q#_TXPLL0
1
Q#_TXPLL1
1
1.6 GHz–6.4 GHz PLL can be used by a pair of adjacent transmit lanes within each of the
immediately adjacent transceiver quads (a total of four lanes). This PLL does
not have SSC capability, but does support jitter attenuation.
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