ABB REG670 - Page 231

PHSL1
PHSL2
PHSL3
PHSL1L2
PHSL2L3
PHSL3L1
STFWL1
STFWL2
STFWL3
FWL1
FWL2
FWL1L2
FWL3
FWL2L3
FWL3L1
BLOCK
VTSZ
OR
t
15 ms
AND
AND
AND
AND
AND
AND
AND
OR
OR
OR
OR
IN present
t
15 ms
AND
t
15 ms
AND
STFWPE
AND
=1
=2
=3
STFW1PH
STFW2PH
STFW3PH
IEC12000134-1-en.vsd
IEC12000134 V1 EN
Figure 91: Additional start outputs 2
PHSL1
PHSL2
PHSL3
PHSL1L2
PHSL2L3
PHSL3L1
STRVL1
STRVL2
STRVL3
RVL1
RVL2
RVL1L2
RVL3
RVL2L3
RVL3L1
BLOCK
VTSZ
OR
t
15 ms
AND
AND
AND
AND
AND
AND
AND
OR
OR
OR
OR
IN present
t
15 ms
AND
t
15 ms
AND
STRVPE
AND
IEC12000141-1-en.vsd
IEC12000141 V1 EN
Figure 92: Additional start outputs 3
1MRK502052-UEN B Section 7
Impedance protection
225
Technical manual