Anritsu MT8820A - Page 179

7.6 Status Report
7-21
Table 7-6-4-1 Description of each bit of status byte register
Bit Name Description
7---Not used
6MSSMaster Summary Status
Indicates that ESB (bit 5), MAV (bit 4), ERR (bit 3) or
END (bit 2) of the status byte register is set. Read using
the *STB? query.
RQS
Service Request
Indicates that the device is requesting a service to the
controller. Read by serial polling.
5ESBEvent Status Bit
Indicates that a standard event specified by the standard
event status enable register has occurred.
4MAVMessage Available
Indicates that data is present in the output queue. When
data is present, 1 is set. When data is absent, 0 is set.
3ERR
Error Event Status (specific to the MT8820A)
Indicates that an event (error) specified by the ERR event
status enable register has occurred.
2ENDEnd Event Status (specific to the MT8820A)
Indicates that an event (operation completed) specified by
the END event status enable register has occurred.
1---Not used
0---Not used
 Query
The status byte register can be read using the *STB? query or by serial poll.
Reading by serial poll causes bit 6 to be the RQS (service request) bit. Reading
with the *STB? query causes bit 6 to be the MSS (Master Status Summary) bit.
Response is the decimal number converted from the sum of the values obtained by
binary-weighting the events that has occurred.
Example:
Query *STB?
Response 96
(96 = 2
5
+ 2
6
Bit 5 and bit 6 are set to 1→
Events specified by the standard event status enable register have occurred.)
 Clear
To clear the status byte register, send the *CLS command