ARM ARM7TDMI - Instruction Cycle Timings

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Chapter 6

Instruction Cycle Timings

This chapter describes the ARM7TDMI processor instruction cycle operations. It

contains the following sections:

• About the instruction cycle timing tables on page 6-3

• Branch and branch with link on page 6-4

• Thumb branch with link on page 6-5

• Branch and Exchange on page 6-6

• Data operations on page 6-7

• Multiply and multiply accumulate on page 6-9

• Load register on page 6-12

• Store register on page 6-14

• Load multiple registers on page 6-15

• Store multiple registers on page 6-17

• Data swap on page 6-18

• Software interrupt and exception entry on page 6-19

• Coprocessor data operation on page 6-20

• Coprocessor data transfer from memory to coprocessor on page 6-21

• Coprocessor data transfer from coprocessor to memory on page 6-23

• Coprocessor register transfer, load from coprocessor on page 6-25

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