GE Multilin F650

GE Multilin F650 Digital Bay Controller F-19
APPENDIX F F.1 FACTORY DEFAULT CONFIGURATION
F
CONT OP RESET_G_05 Not Configured
CONT OP RESET_G_06 Not Configured
CONT OP RESET_G_07 Not Configured
CONT OP RESET_G_08 Not Configured
SETPOINT>RELAY CONFIGURATION>LEDS
LED ID LED NAME SOURCE
SIGNAL
LOGIC
SOURCE
LOGIC
LED01 TRIP VO_083_GENERAL_TRIP
LED02 50/51P TRIP VO_019_PHASE_OVERCURRENT_TRIP
LED03 50/51G TRIP VO_069_GROUND_OVERCURRENT_TRIP
LED04 27 TRIP VO_073_27P_TRIP
LED05 59 TRIP VO_074_59P_TRIP
LED06 PICKUP VO_085_GENERAL_PKP
LED07 50/51P PICKUP VO_007_PHASE_OVERCURRENT_PKP
LED08 50/51G PICKUP VO_009_GROUND_OVERCURRENT_PKP
LED09 27 PICKUP VO_045_27P_PKP
LED10 59 PICKUP VO_046_59P_PKP
LED11 79 READY AR READY
LED12 79 IN-PROG AR RCL IN PROGRESS
LED13 79 BLOCK AR BLOCK BY LEVEL
LED14 79 INHIBIT AR CONDS INPUT NOT
LED15 79 LOCKOUT AR LOCKOUT
SETPOINT>RELAY CONFIGURATION>PROTECTION ELEMENTS
PROTECTION ELEMENT SOURCE
SIGNAL
LOGIC
SOURCE
LOGIC
LED RESET INPUT OPERATION BIT 3
PH IOC1 HIGH A BLK
GROUP 1 BLOCKED
CONT IP_F_CC2 (50P BLOCK)(CC2)
PHASE DIR1 A OP NOT
LATCHED VIRT IP 1
PH IOC1 HIGH B BLK
GROUP 1 BLOCKED
CONT IP_F_CC2 (50P BLOCK)(CC2)
PHASE DIR1 B OP NOT
LATCHED VIRT IP 1
PH IOC1 HIGH C BLK
GROUP 1 BLOCKED
CONT IP_F_CC2 (50P BLOCK)(CC2)
PHASE DIR1 C OP NOT
LATCHED VIRT IP 1
PH IOC2 HIGH A BLK
GROUP 2 BLOCKED
CONT IP_F_CC2 (50P BLOCK)(CC2)
PHASE DIR2 A OP NOT
LATCHED VIRT IP 1
PH IOC2 HIGH B BLK
GROUP 2 BLOCKED
CONT IP_F_CC2 (50P BLOCK)(CC2)
PHASE DIR2 B OP NOT
LATCHED VIRT IP 1