Intel Cyclone 10 GX User Manual

6.16.1.2.1. Examples of Enabling the PRBS9 and PRBS31 Pattern Generators in Bonded
Designs
Example 7. Enabling the PRBS9 pattern generator in 10-bit mode
1. Perform the necessary steps from steps 1 to 7 in Steps to Perform Dynamic
Reconfiguration.
2. Perform a read-modify-write to address x006[7:0] with the following bits: 8’b01- -
1100
3. Perform a read-modify-write to address x007[7:0] with the following bits: 8’b0010
- - - -
4. Perform a read-modify-write to address x008[7:0] with the following bits: 8’b -
000 - - - -
5. Perform a read-modify-write to address x110[7:0] with the following bits: 8’b - - -
- - 100
6. Perform a read-modify-write to address x111[5:0] with the following bits:
8'b---11000. You must read and save the value in the register 0x111[5:0] before
changing the x1_clock_source_sel setting to xN non bonding.
7. Perform the necessary steps from steps 9 to 12 in Steps to Perform Dynamic
Reconfiguration.
Note: A dash (-) indicates that the corresponding bit value should not be modified during
read-modify-write.
Example 8. Enabling the PRBS31 pattern generator in 64-bit mode
1. Perform the necessary steps from steps 1 to 7 in Steps to Perform Dynamic
Reconfiguration.
2. Perform a read-modify-write to address x006[7:0] with the following bits: 8’b01- -
0100
3. Perform a read-modify-write to address x007[7:0] with the following bits: 8’b0000
- - - -
4. Perform a read-modify-write to address x008[7:0] with the following bits: 8’b -
001 - - - -
5. Perform a read-modify-write to address x110[7:0] with the following bits: 8’b - - -
- - 011
6. Perform a read-modify-write to address x111[5:0] with the following bits:
8'b---11000. You must read and save the value in the register 0x111[5:0] before
changing the x1_clock_source_sel setting to xN non bonding.
7. Perform the necessary steps from steps 9 to 12 in Steps to Perform Dynamic
Reconfiguration.
Note: A dash (-) indicates that the corresponding bit value should not be modified during
read-modify-write.
6.16.1.3. Enabling the PRBS Data Checker in Non Bonded design
You must perform a sequence of read-modify-writes to the Transceiver Native PHY
reconfiguration interface to enable the PRBS checker. You must perform read-modify-
writes to addresses 0x00A, 0x00B, 0x00C, and 0x13F. To enable the PRBS checker,
follow these steps:
6. Reconfiguration Interface and Dynamic Reconfiguration
UG-20070 | 2018.09.24
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10 GX Transceiver PHY User Guide
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Intel Cyclone 10 GX Specifications

General

Brand	Intel
Model	Cyclone 10 GX
Category	Transceiver
Language	English