Intel Cyclone 10 GX User Manual

Table 74. Interlaken Frame Synchronizer Parameters
Parameter Value
Enable Interlaken frame synchronizer On
Frame synchronizer metaframe length 5 to 8192 (Intel recommends a minimum metaframe
length of 128)
Enable rx_enh_frame port On
Enable rx_enh_frame_lock port On / Off
Enable rx_enh_frame_diag_status port On / Off
Table 75. Interlaken CRC-32 Generator and Checker Parameters
Parameter Value
Enable Interlaken TX CRC-32 generator On
Enable Interlaken TX CRC-32 generator error
insertion
On / Off
Enable Interlaken RX CRC-32 checker On
Enable rx_enh_crc32_err port On / Off
Table 76. Scrambler and Descrambler Parameters
Parameter Value
Enable TX scrambler (10GBASE-R / Interlaken) On
TX scrambler seed (10GBASE-R / Interlaken) 0x1 to 0x3FFFFFFFFFFFFFF
Enable RX descrambler (10GBASE-R / Interlaken) On
Table 77. Interlaken Disparity Generator and Checker Parameters
Parameter Value
Enable Interlaken TX disparity generator On
Enable Interlaken RX disparity checker On
Enable Interlaken TX random disparity bit On / Off
Table 78. Block Sync Parameters
Parameter Value
Enable RX block synchronizer On
Enable rx_enh_blk_lock port On / Off
Table 79. Gearbox Parameters
Parameter Value
Enable TX data bitslip Off
Enable TX data polarity inversion On / Off
Enable RX data bitslip Off
continued...
2. Implementing Protocols in Intel Cyclone 10 GX Transceivers
UG-20070 | 2018.09.24
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10 GX Transceiver PHY User Guide
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Intel Cyclone 10 GX Specifications

General

Brand	Intel
Model	Cyclone 10 GX
Category	Transceiver
Language	English