Intel Cyclone 10 GX User Manual

Parameter Value
Enable RX/TX FIFO double-width mode Off
TX FIFO mode Interlaken
TX FIFO partially full threshold 8 to 15
TX FIFO partially empty threshold 1 to 8
Enable tx_enh_fifo_full port On / Off
Enable tx_enh_fifo_pfull port On / Off
Enable tx_enh_fifo_empty port On / Off
Enable tx_enh_fifo_pempty port On / Off
RX FIFO mode Interlaken
RX FIFO partially full threshold from 10-29 (no less than pempty_threshold+8)
RX FIFO partially empty threshold 2 to 10
Enable RX FIFO alignment word deletion (Interlaken) On / Off
Enable RX FIFO control word deletion (Interlaken) On / Off
Enable rx_enh_data_valid port On / Off
Enable rx_enh_fifo_full port On / Off
Enable rx_enh_fifo_pfull port On / Off
Enable rx_enh_fifo_empty port On / Off
Enable rx_enh_fifo_pempty port On / Off
Enable rx_enh_fifo_del port (10GBASE-R) Off
Enable rx_enh_fifo_insert port (10GBASE-R) Off
Enable rx_enh_fifo_rd_en port On
Enable rx_enh_fifo_align_val port (Interlaken) On / Off
Enable rx_enh_fifo_align_clr port (Interlaken) On
Table 73. Interlaken Frame Generator Parameters
Parameter Value
Enable Interlaken frame generator On
Frame generator metaframe length 5 to 8192 (Intel recommends a minimum metaframe
length of 128)
Enable frame generator burst control On
Enable tx_enh_frame port On
Enable tx_enh_frame_diag_status port On
Enable tx_enh_frame_burst_en port On
2. Implementing Protocols in Intel Cyclone 10 GX Transceivers
UG-20070 | 2018.09.24
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10 GX Transceiver PHY User Guide
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Intel Cyclone 10 GX Specifications

General

Brand	Intel
Model	Cyclone 10 GX
Category	Transceiver
Language	English