R&S ZVB - Page 1064

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ZVB / R&S
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ZVT Command Reference
SCPI Command Reference
Operating Manual 1145.1084.12 – 30 1049
STATus:QUEStionable:INTegrity:PTRansition
Sets the positive transition filter. If a bit is set, a 0 to 1 transition in the corresponding bit of the associated
condition register causes a 1 to be written in the associated bit of the corresponding event register.
<NRf>
0 to 65535 (decimal representation)
*RST value
– (see also Reset Values of the status reporting system)
SCPI, Command Types
Confirmed, command or query
Example:
STAT:QUES:INT:PTR 4
Set bit no. 2 of the QUEStionable:INTegrity:PTRansition register
STATus:QUEStionable:LIMit<1|2>:CONDition?
Returns the contents of the CONDition part of the QUEStionable:LIMit<1|2> register. Reading the
CONDition registers is nondestructive.
*RST value
–
SCPI, Command
Types
Confirmed, query only
Example:
STAT:QUES:LIMit:COND?
Query the CONDition part of the QUEStionable:LIMit1 register to retrieve the
current status of the limit check.
STATus:QUEStionable:LIMit<1|2>:ENABle
Sets the enable mask which allows true conditions in the EVENt part of the QUEStionable:LIMit<1|2>
register to be reported in the summary bit. If a bit is 1 in the enable register and its associated event bit
transitions to true, a positive transition will occur in the summary bit (bit 10 of the QUEStionable register
for the LIMit1 register, bit 0 of the LIMit1 register for the LIMit2 register).
<NRf>
0 to 65535 (decimal representation)
*RST value
– (see also Reset Values of the status reporting system)
SCPI, Command Types
Confirmed, command or query
Example:
STAT:QUES:LIM2:ENAB 6
Set bits no. 1 and 2 of the QUEStionable:LIMit2:ENABle register
STATus:QUEStionable:LIMit<1|2>[:EVENt]?
Returns the contents of the EVENt part of the QUEStionable:LIMit<1|2> register. Reading an EVENt
register clears it.
*RST value
–