RL78/G1H CHAPTER 12 WATCHDOG TIMER
R01UH0575EJ0120 Rev. 1.20 Page 275 of 920
Dec 22, 2016
12.3 Register Controlling Watchdog Timer
The watchdog timer is controlled by the watchdog timer enable register (WDTE).
12.3.1 Watchdog timer enable register (WDTE)
Writing “ACH” to the WDTE register clears the watchdog timer counter and starts counting again.
This register can be set by an 8-bit memory manipulation instruction.
Reset signal generation sets this register to 9AH or 1AH
Note
.
Figure 12 - 2 Format of Watchdog timer enable register (WDTE)
Note The WDTE register reset value differs depending on the WDTON bit setting value of the option byte
(000C0H). To operate watchdog timer, set the WDTON bit to 1.
Caution 1. If a value other than “ACH” is written to the WDTE register, an internal reset signal is generated.
Caution 2. If a 1-bit memory manipulation instruction is executed for the WDTE register, an internal reset signal
is generated.
Caution 3. The value read from the WDTE register is 9AH/1AH (this differs from the written value (ACH)).
Address: FFFABH After reset: 9AH/1AH
Note
R/W
Symbol76543210
WDTE
WDTON Bit Setting Value WDTE Register Reset Value
0 (watchdog timer count operation disabled) 1AH
1 (watchdog timer count operation enabled) 9AH
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