RL78/G1H CHAPTER 26 OPTION BYTE
R01UH0575EJ0120 Rev. 1.20 Page 798 of 920
Dec 22, 2016
(3) 000C2H/010C2H
Setting of flash operation mode
• LS (low-speed main) mode
• HS (high-speed main) mode
Setting of the frequency of the high-speed on-chip oscillator
• Select from 1 MHz to 32 MHz.
Caution Set the same value as 000C2H to 010C2H when the boot swap operation is used because
000C2H is replaced by 010C2H.
26.1.2 On-chip debug option byte (000C3H/ 010C3H)
Control of on-chip debug operation
• On-chip debug operation is disabled or enabled.
Handling of data of flash memory in case of failure in on-chip debug security ID authentication
• Data of flash memory is erased or not erased in case of failure in on-chip debug security ID
authentication.
Caution Set the same value as 000C3H to 010C3H when the boot swap operation is used because
000C3H is replaced by 010C3H.
To Next Page
Loading...
Need help?
General
