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Renesas RL78/G1H

Renesas RL78/G1H
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RL78/G1H CHAPTER 14 SERIAL ARRAY UNIT
R01UH0575EJ0120 Rev. 1.20 Page 324 of 920
Dec 22, 2016
14.1 Functions of Serial Array Unit
Each serial interface has the following features.
14.1.1 3-wire serial I/O (CSIp)
Data is transmitted or received in synchronization with the serial clock (SCK) output from the master channel.
3-wire serial communication is clocked communication performed by using three communication lines: one for
the serial clock (SCK), one for transmitting serial data (SO), one for receiving serial data (SI).
For details about the settings, see 14.5 Operation of 3-Wire Serial I/O (CSIp) Communication.
[Data transmission/reception]
Data length of 7 or 8 bits
Phase control of transmit/receive data
MSB/LSB first selectable
[Clock control]
Master/slave selection
Phase control of I/O clock
Setting of transfer period by prescaler and internal counter of each channel
Maximum transfer rate
Note
During master communication: Max. fCLK/4
During slave communication: Max. f
MCK/6
[Interrupt function]
Transfer end interrupt/buffer empty interrupt
[Error detection flag]
Overrun error
Note Use the clocks within a range satisfying the SCK cycle time (t
KCY) characteristics. For details, see
CHAPTER 31 ELECTRICAL SPECIFICATIONS.

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