RL78/G1H CHAPTER 8 TIMER RJ
R01UH0575EJ0120 Rev. 1.20 Page 231 of 920
Dec 22, 2016
8.4 Timer RJ Operation
8.4.1 Reload Register and Counter Rewrite Operation
Regardless of the operating mode, the timing of the rewrite operation to the reload register and the counter
differs depending on the value in the TSTART bit in the TRJCR0 register. When the TSTART bit is 0 (count
stops), the count value is directly written to the reload register and the counter. When the TSTART bit is 1 (count
starts), the value is written to the reload register in synchronization with the count source, and then to the counter
in synchronization with the next count source.
Figure 8 - 7 shows the Timing of Rewrite Operation with TSTART Bit Value.
Figure 8 - 7 Timing of Rewrite Operation with TSTART Bit Value
Write 5678H to TRJ0 register by a program
Write 1234H to TRJ0 register by a program
FFFFH 1234H5678H
FFFFH 1234H5678H
Count source
TSTART bit in TRJCR0
register
TRJ0 register
Reload register load signal
Reload register load clock
Counter load signal
Counter load clock
Reload register
Timer RJ0 counter
5678HFFFFH
1232H5677H 5676H 5675H 5674H5673H 5672H 5671H 5670H 566FH 1234H 1233H 1231H 1230H
Write 1 to TSTART bit in TRJCR0 register by a program
Register write clock
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