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Renesas RL78/G1H

Renesas RL78/G1H
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RL78/G1H CHAPTER 10 12-BIT INTERVAL TIMER
R01UH0575EJ0120 Rev. 1.20 Page 261 of 920
Dec 22, 2016
CHAPTER 10 12-BIT INTERVAL TIMER
10.1 Functions of 12-bit Interval Timer
An interrupt (INTIT) is generated at any previously specified time interval. It can be utilized for wakeup from STOP
mode and triggering an A/D converter’s SNOOZE mode.
10.2 Configuration of 12-bit Interval Timer
The 12-bit interval timer includes the following hardware.
Figure 10 - 1 Block Diagram of 12-bit Interval Timer
Table 10 - 1 Configuration of 12-bit Interval Timer
Item Configuration
Counter 12-bit counter
Control registers Peripheral enable register 0 (PER0)
Subsystem clock supply mode control register (OSMC)
12-bit interval timer control register (ITMC)
RINTE
ITMCMP11 to ITMCMP0
12-bit interval timer control
register (ITMC)
Match signal
Clear
12-bit counter
Internal bus
Interrupt request signal
(INTIT)
Subsystem clock supply
mode control register
(OSMC)
WUTMM
CK0
fSUB
fIL
Selector
Count operation
control circuit
Count
clock

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