Renesas RL78/G1H

RL78/G1H CHAPTER 6 CLOCK GENERATOR
R01UH0575EJ0120 Rev. 1.20 Page 110 of 920
Dec 22, 2016
6.3.6 Peripheral enable registers 0, 1 (PER0, PER1)
These registers are used to enable or disable supplying the clock to the peripheral hardware. Clock supply to the
hardware that is not used is also stopped so as to decrease the power consumption and noise.
To use the peripheral functions below, which are controlled by these registers, set (1) the bit corresponding to
each function before specifying the initial settings of the peripheral functions.
• Real-time clock and 12-bit interval timer
• Serial interface IICA1
• A/D converter
• Serial interface IICA0
• Serial array unit 1
• Serial array unit 0
• Timer array unit 1
• Timer array unit 0
•DTC
• Timer RJ
The PER0 and PER1 registers can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation clears these registers to 00H.
Figure 6 - 7 Format of Peripheral enable register 0 (PER0) (1/3)
Address: F00F0H After reset: 00H R/W
Symbol <7> <6> <5> <4> <3> <2> <1> <0>
PER0 RTCEN
IICA1EN ADCEN IICA0EN SAU1EN SAU0EN TAU1EN TAU0EN
RTCEN Control of supplying input clock for real-time clock (RTC) and 12-bit interval timer
0 Stops input clock supply.
• SFR used by the real-time clock (RTC) and 12-bit interval timer cannot be written.
• The real-time clock (RTC) and 12-bit interval timer are in the reset status.
1 Enables input clock supply.
• SFR used by the real-time clock (RTC) and 12-bit interval timer can be read and written.