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Renesas RL78/G1H

Renesas RL78/G1H
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RL78/G1H CHAPTER 14 SERIAL ARRAY UNIT
R01UH0575EJ0120 Rev. 1.20 Page 332 of 920
Dec 22, 2016
14.3.1 Peripheral enable register 0 (PER0)
PER0 is used to enable or disable supplying the clock to the peripheral hardware. Clock supply to a hardware
macro that is not used is stopped in order to reduce the power consumption and noise.
When serial array unit 0 is used, be sure to set bit 2 (SAU0EN) of this register to 1.
When serial array unit 1 is used, be sure to set bit 3 (SAU1EN) of this register to 1.
The PER0 register can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation clears the PER0 register to 00H.
Figure 14 - 4 Format of Peripheral enable register 0 (PER0)
Caution When setting serial array unit m, be sure to first set the following registers with the SAUmEN bit set
to 1. If SAUmEN = 0, writing to a control register of serial array unit m is ignored, and, even if the
register is read, only the default value is read (except for noise filter enable register 0 (NFEN0), port
input mode registers, port output mode registers, port mode registers, port mode control registers,
and port registers).
Serial clock select register m (SPSm)
Serial mode register mn (SMRmn)
Serial communication operation setting register mn (SCRmn)
Serial data register mn (SDRmn)
Serial flag clear trigger register mn (SIRmn)
Serial status register mn (SSRmn)
Serial channel start register m (SSm)
Serial channel stop register m (STm)
Serial channel enable status register m (SEm)
Serial output enable register m (SOEm)
Serial output level register m (SOLm)
Serial output register m (SOm)
Address: F00F0H After reset: 00H R/W
Symbol <7> <6> <5> <4> <3> <2> <1> <0>
PER0 RTCEN IICA1EN ADCEN IICA0EN SAU1EN SAU0EN TAU1EN TAU0EN
SAUmEN Control of serial array unit m input clock supply
0 Stops supply of input clock.
SFR used by serial array unit m cannot be written.
Serial array unit m is in the reset status.
1 Enables input clock supply.
SFR used by serial array unit m can be read/written.

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