RL78/G1H CHAPTER 7 TIMER ARRAY UNIT
R01UH0575EJ0120 Rev. 1.20 Page 169 of 920
Dec 22, 2016
7.3.13 Noise filter enable register 1 (NFEN1)
The NFEN1 register is used to set whether the noise filter can be used for the timer input signal to each channel.
Enable the noise filter by setting the corresponding bits to 1 on the pins in need of noise removal. When the noise
filter is enabled, after synchronization with the operating clock (f
MCK) for the target channel, whether the signal
keeps the same value for two clock cycles is detected.
When the noise filter is OFF, only synchronization is performed with the operation clock of target channel (f
MCK)
Note
.
The NFEN1 register can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation clears this register to 00H.
Note For details, see 7.5.1 (2) When valid edge of input signal via the TImn pin is selected (CCSmn =
1), 7.5.2 Start timing of counter, and 7.7 Timer Input (TImn) Control.
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