Renesas RL78/G1H - General-Purpose Registers

RL78/G1H CHAPTER 4 CPU ARCHITECTURE
R01UH0575EJ0120 Rev. 1.20 Page 51 of 920
Dec 22, 2016
Register bank 0 HL
DE
BC
AX
H
L
D
E
B
C
A
X
8-bit processing
15 0 7
16-bit processing
0
Register bank 1
Register bank 2
Register bank 3
FFEE0H
FFEE8H
FFEF0H
FFEF8H
FFEFFH
4.2.2 General-purpose registers
General-purpose registers are mapped at particular addresses (FFEE0H to FFEFFH) of the data memory. The
general-purpose registers consists of 4 banks, each bank consisting of eight 8-bit registers (X, A, C, B, E, D, L,
and H).
Each register can be used as an 8-bit register, and two 8-bit registers can also be used in a pair as a 16-bit
register (AX, BC, DE, and HL).
Register banks to be used for instruction execution are set by the CPU control instruction (SEL RBn). Because of
the 4-register bank configuration, an efficient program can be created by switching between a register for normal
processing and a register for interrupt processing for each bank.
Caution It is prohibited to use the general-purpose register (FFEE0H to FFEFFH) space for fetching
instructions or as a stack area.
Figure 4 - 9 Configuration of General-Purpose Registers
(a) Function name