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Renesas RL78/G1H User Manual

Renesas RL78/G1H
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RL78/G1H CHAPTER 4 CPU ARCHITECTURE
R01UH0575EJ0120 Rev. 1.20 Page 50 of 920
Dec 22, 2016
In stack addressing through a stack pointer, the SP is decremented ahead of write (save) to the stack
memory and is incremented after read (restore) from the stack memory.
Caution 1. Since reset signal generation makes the SP contents undefined, be sure to initialize the
SP before using the stack.
Caution 2.It is prohibited to use the general-purpose register (FFEE0H to FFEFFH) space for
fetching instructions or as a stack area.
Caution 3. Do not allocate RAM addresses which are used as a stack area, a data buffer, a branch
destination of vector interrupt processing, and a DTC transfer destination/transfer source
to the area FFE20H to FFEDFH when performing self-programming and rewriting the data
flash memory.
Caution 4. Use of the RAM areas of the following products is prohibited when performing self-
programming and rewriting the data flash memory, because these areas are used for
each library.
R5F11FLL: F3F00H to F4309H
Caution 5. The internal RAM area in the following products cannot be used as stack memory when
using the on-chip debugging trace function.
R5F11FLL: F4300H to F46FFH

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Renesas RL78/G1H Specifications

General IconGeneral
BrandRenesas
ModelRL78/G1H
CategoryMicrocontrollers
LanguageEnglish

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