RL78/G1H CHAPTER 7 TIMER ARRAY UNIT
R01UH0575EJ0120 Rev. 1.20 Page 165 of 920
Dec 22, 2016
7.3.9 Timer output enable register m (TOEm)
The TOEm register is used to enable or disable timer output of each channel.
Channel n for which timer output has been enabled becomes unable to rewrite the value of the TOmn bit of timer
output register m (TOm) described later by software, and the value reflecting the setting of the timer output
function through the count operation is output from the timer output pin (TOmn).
The TOEm register can be set by a 16-bit memory manipulation instruction.
The lower 8 bits of the TOEm register can be set with a 1-bit or 8-bit memory manipulation instruction with
TOEmL.
Reset signal generation clears this register to 0000H.
Figure 7 - 21 Format of Timer output enable register m (TOEm)
Caution Be sure to clear bits 15 to 4 , 2 to 0 to “0” in TOE0 register. Set to 0000H register in TOE1 register.
Remark
m: Unit number (m = 0, 1), n: Channel number (n = 0 to 3)
Address: F01BAH, F01BBH (TOE0), F01FAH, F01FBH (TOE1) After reset: 0000H R/W
Symbol1514131211109876543210
TOEm000000000000
TOEm
3
TOEm
2
TOEm
1
TOEm
0
TOE
mn
Timer output enable/disable of channel n
0 Timer output is disabled.
Timer operation is not applied to the TOmn bit and the output is fixed.
Writing to the TOmn bit is enabled and the level set in the TOmn bit is output from the TOmn pin.
1 Timer output is enabled.
Timer operation is applied to the TOmn bit and an output waveform is generated.
Writing to the TOmn bit is ignored.
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