RL78/G1H CHAPTER 8 TIMER RJ
R01UH0575EJ0120 Rev. 1.20 Page 226 of 920
Dec 22, 2016
8.3.1 Peripheral enable register 1 (PER1)
The PER1 register is used to enable or disable supplying the clock to the peripheral hardware. Clock supply to
the hardware that is not used is also stopped so as to decrease the power consumption and noise.
To use Timer RJ, be sure to set bit 0 (TRJ0EN) to 1.
The PER1 register can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation clears this register to 00H.
Figure 8 - 2 Format of Peripheral enable register 1 (PER1)
Caution 1. When setting timer RJ, be sure to set the TRJ0EN bit to 1 first. If TRJ0EN = 0, writing to a control
register of timer RJ is ignored, and all read values are default values.
Caution 2. Be sure to set the bits 1, 2, 4 to 7 to 0:
Address: F007AH After reset: 00H R/W
Symbol 7 6 5 4 <3> 2 1 <0>
PER1 0 0 0 0 DTCEN 0 0 TRJ0EN
TRJ0EN Control of timer RJ0 input clock supply
0 Stops input clock supply.
• SFR used by timer RJ0 cannot be written.
• Timer RJ0 is in the reset status.
1 Enables input clock supply.
• SFR used by timer RJ0 can be read and written.
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