RL78/G1H CHAPTER 16 DATA TRANSFER CONTROLLER (DTC)
R01UH0575EJ0120 Rev. 1.20 Page 526 of 920
Dec 22, 2016
16.3.11 DTC activation enable register i (DTCENi) (i = 0 to 4)
This is an 8-bit register which enables or disables DTC activation by interrupt sources. Table 16 - 6 lists the
Correspondences between Interrupt Sources and Bits DTCENi0 to DTCENi7.
The DTCENi register can be set by an 8-bit memory manipulation instruction and a 1-bit memory manipulation
instruction.
Caution 1. Modify bits DTCENi0 to DTCENi7 if an activation source corresponding to the bit has not been
generated.
Caution 2. Do not access the DTCENi register using a DTC transfer.
Caution 3. The assigned functions differ depending on the product. For the bits to which no function is
assigned, be sure to set their values to 0.
Figure 16 - 12 Format of DTC activation enable register i (DTCENi) (i = 0 to 4)
Address: F02E8H (DTCEN0), F02E9H (DTCEN1), F02EAH (DTCEN2), After reset: 00H R/W
F02EBH (DTCEN3), F02ECH (DTCEN4)
Symbol76543210
DTCENi DTCENi7 DTCENi6 DTCENi5 DTCENi4 DTCENi3 DTCENi2 DTCENi1 DTCENi0
DTCENi7 DTC activation enable i7
0 Activation disabled
1 Activation enabled
The DTCENi7 bit is set to 0 (activation disabled) by a condition for generating a transfer end interrupt.
DTCENi6 DTC activation enable i6
0 Activation disabled
1 Activation enabled
The DTCENi6 bit is set to 0 (activation disabled) by a condition for generating a transfer end interrupt.
DTCENi5 DTC activation enable i5
0 Activation disabled
1 Activation enabled
The DTCENi5 bit is set to 0 (activation disabled) by a condition for generating a transfer end interrupt.
DTCENi4 DTC activation enable i4
0 Activation disabled
1 Activation enabled
The DTCENi4 bit is set to 0 (activation disabled) by a condition for generating a transfer end interrupt.
DTCENi3 DTC activation enable i3
0 Activation disabled
1 Activation enabled
The DTCENi3 bit is set to 0 (activation disabled) by a condition for generating a transfer end interrupt.
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