RL78/G1H CHAPTER 14 SERIAL ARRAY UNIT
R01UH0575EJ0120 Rev. 1.20 Page 413 of 920
Dec 22, 2016
(4) Processing flow (in continuous transmission mode)
Figure 14 - 78 Timing Chart of UART Transmission (in Continuous Transmission Mode)
Note If transmit data is written to the SDRmn register while the BFFmn bit of serial status register mn (SSRmn) is 1 (valid data is
stored in serial data register mn (SDRmn)), the transmit data is overwritten.
Caution The MDmn0 bit of serial mode register mn (SSRmn) can be rewritten even during operation. However, rewrite it
before transfer of the last bit is started, so that it will be rewritten before the transfer end interrupt of the last
transmit data.
Remark
m: Unit number (m = 0, 1), n: Channel number (n = 2), q: UART number (q = 1, 3), mn = 02, 12
P
Shift operation
Shift operation
ST ST P ST P SP
<1>
<2> <2><3>
Note
<2><3> <5>
<6>
<3>
<4>
SPSP
Shift operation
SSmn
SEmn
SDRmn
TxDq pin
Shift register mn
INTSTq
TSFmn
BFFmn
MDmn0
STmn
Data transmissionData transmissionData transmission
Transmit data 2Transmit data 1
Transmit data 3
Transmit data 3Transmit data 2Transmit data 1
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