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Renesas RL78/G1H

Renesas RL78/G1H
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RL78/G1H CHAPTER 15 SERIAL INTERFACE IICA
R01UH0575EJ0120 Rev. 1.20 Page 449 of 920
Dec 22, 2016
Remark 1. Calculate the rise time (tR) and fall time (tF) of the SDAAn and SCLAn signals separately, because
they differ depending on the pull-up resistance and wire load.
Remark 2. IICWLn: IICA low-level width setting register n
IICWHn: IICA high-level width setting register n
t
F: SDAAn and SCLAn signal falling times
tR: SDAAn and SCLAn signal rising times
f
MCK: IICA operating clock frequency
Remark 3. n = 0, 1

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