RL78/G1H CHAPTER 18 RF TRANSCEIVER
R01UH0575EJ0120 Rev. 1.20 Page 580 of 920
Dec 22, 2016
(14) Transmit/receive status register 2 (BBTXRXST2)
This register stores the information on the various types of the RF transmit/receive status.
The receive RAM bank flag bit is used to indicate the receive RAM bank upon start of the reception.
The receive data storage bank flag bit is used to indicate the reception storage bank upon start of the
reception.
The BBTXRXST2 register consists of 8 bits and can be accessed (serial interface communication) in 8 bit
unit.
Reset signal generation sets this register to 03H.
Figure 18 - 20 Transmit/Receive Status Register 2 (BBTXRXST2) Format
Caution “0” is always read for bits 2 to 7.
Address:
0010H
After reset:
03H R
Symbol76543210
BBTXRX
ST2
000000RCVSTOREF
LG
RCVBANKFL
G
RCVSTORE
FLG
Receive data storage bank flag bit
0 Receive data storage bank 0
1 Receive data storage bank 1
RCVBANKF
LG
Receive RAM bank flag bit
0 Receive RAM bank 0
1 Receive RAM bank 1
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