Counter Stage
Description
Logic of a Stage
[lo-cnt-stage-260314-01, 2, en_US]
Figure 7-20
Logic Diagram of the Counter Stage
Measurands/Input Values
The measurand/input values of the counter stage are the phase- and group-segregated counter contents that
are determined in the General FB.
7.4.5
7.4.5.1
Capacitor Bank Protection
7.4 Current-Unbalance Protection for Capacitors, 3-Phase
SIPROTEC 5, Overcurrent Protection, Manual 999
C53000-G5040-C017-8, Edition 07.2017
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