ST STM32F2 User Manual

UM1940
LL RCC Generic Driver
DocID028236 Rev 2
1049/1371
LL_RCC_RTC_HSE_DIV_26
HSE clock divided by 26
LL_RCC_RTC_HSE_DIV_27
HSE clock divided by 27
LL_RCC_RTC_HSE_DIV_28
HSE clock divided by 28
LL_RCC_RTC_HSE_DIV_29
HSE clock divided by 29
LL_RCC_RTC_HSE_DIV_30
HSE clock divided by 30
LL_RCC_RTC_HSE_DIV_31
HSE clock divided by 31
AHB prescaler
LL_RCC_SYSCLK_DIV_1
SYSCLK not divided
LL_RCC_SYSCLK_DIV_2
SYSCLK divided by 2
LL_RCC_SYSCLK_DIV_4
SYSCLK divided by 4
LL_RCC_SYSCLK_DIV_8
SYSCLK divided by 8
LL_RCC_SYSCLK_DIV_16
SYSCLK divided by 16
LL_RCC_SYSCLK_DIV_64
SYSCLK divided by 64
LL_RCC_SYSCLK_DIV_128
SYSCLK divided by 128
LL_RCC_SYSCLK_DIV_256
SYSCLK divided by 256
LL_RCC_SYSCLK_DIV_512
SYSCLK divided by 512
System clock switch
LL_RCC_SYS_CLKSOURCE_HSI
HSI selection as system clock
LL_RCC_SYS_CLKSOURCE_HSE
HSE selection as system clock
LL_RCC_SYS_CLKSOURCE_PLL
PLL selection as system clock
System clock switch status
LL_RCC_SYS_CLKSOURCE_STATUS_HSI
HSI used as system clock
LL_RCC_SYS_CLKSOURCE_STATUS_HSE
HSE used as system clock
LL_RCC_SYS_CLKSOURCE_STATUS_PLL
PLL used as system clock
Calculate frequencies
__LL_RCC_CALC_PLLCLK_FREQ
Description:
Helper macro to calculate the PLLCLK
frequency on system domain.
Parameters:
__INPUTFREQ__: PLL Input frequency
(based on HSE/HSI)
__PLLM__: This parameter can be one of
the following values:
LL_RCC_PLLM_DIV_2
LL_RCC_PLLM_DIV_3
LL_RCC_PLLM_DIV_4
LL_RCC_PLLM_DIV_5
LL_RCC_PLLM_DIV_6
LL_RCC_PLLM_DIV_7
LL_RCC_PLLM_DIV_8

ST STM32F2 Specifications

General

Brand	ST
Model	STM32F2
Category	Microcontrollers
Language	English