frequencies of these clocks. All the peripheral clocks are derived from the System
clock (SYSCLK) except: I2S: the I2S clock can be derived either from a specific PLL
(PLLI2S) or from an external clock mapped on the I2S_CKIN pin. You have to use
__HAL_RCC_PLLI2S_CONFIG() macro to configure this clock.RTC: the RTC clock
can be derived either from the LSI, LSE or HSE clock divided by 2 to 31. You have to
use __HAL_RCC_RTC_CONFIG() and __HAL_RCC_RTC_ENABLE() macros to
configure this clock. USB OTG FS, SDIO and RTC: USB OTG FS require a frequency
equal to 48 MHz to work correctly, while the SDIO require a frequency equal or lower
than to 48. This clock is derived of the main PLL through PLLQ divider.IWDG clock
which is always the LSI clock.
2. For the stm32f2xx devices, the maximum frequency of the SYSCLK and HCLK is 120
MHz, PCLK2 60 MHz and PCLK1 30 MHz. Depending on the device voltage range,
the maximum frequency should be adapted (refer to the device reference manual for
additional information).
This section contains the following APIs:
HAL_RCC_DeInit()
HAL_RCC_OscConfig()
HAL_RCC_ClockConfig()
36.2.4 Peripheral Control functions
This subsection provides a set of functions allowing to control the RCC Clocks
frequencies.
This section contains the following APIs:
HAL_RCC_MCOConfig()
HAL_RCC_EnableCSS()
HAL_RCC_DisableCSS()
HAL_RCC_GetSysClockFreq()
HAL_RCC_GetHCLKFreq()
HAL_RCC_GetPCLK1Freq()
HAL_RCC_GetPCLK2Freq()
HAL_RCC_GetOscConfig()
HAL_RCC_GetClockConfig()
HAL_RCC_NMI_IRQHandler()
HAL_RCC_CSSCallback()
36.2.5 Detailed description of functions
HAL_RCC_DeInit
void HAL_RCC_DeInit (void )
Resets the RCC clock configuration to the default reset state.
The default reset state of the clock configuration is given
below: HSI ON and used as system clock sourceHSE, PLL
and PLLI2S OFFAHB, APB1 and APB2 prescaler set to
1.CSS, MCO1 and MCO2 OFFAll interrupts disabled
This function doesn't modify the configuration of the
Peripheral clocksLSI, LSE and RTC clocks
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