CCMR2 OC4PE LL_TIM_OC_EnablePreload
LL_TIM_OC_DisablePreload
__STATIC_INLINE void LL_TIM_OC_DisablePreload
(TIM_TypeDef * TIMx, uint32_t Channel)
Disable compare register (TIMx_CCRx) preload for the output
channel.
TIMx: Timer instance
Channel: This parameter can be one of the following values:
LL_TIM_CHANNEL_CH1
LL_TIM_CHANNEL_CH2
LL_TIM_CHANNEL_CH3
LL_TIM_CHANNEL_CH4
Reference Manual to
LL API cross
reference:
CCMR1 OC1PE LL_TIM_OC_DisablePreload
CCMR1 OC2PE LL_TIM_OC_DisablePreload
CCMR2 OC3PE LL_TIM_OC_DisablePreload
CCMR2 OC4PE LL_TIM_OC_DisablePreload
LL_TIM_OC_IsEnabledPreload
__STATIC_INLINE uint32_t LL_TIM_OC_IsEnabledPreload
(TIM_TypeDef * TIMx, uint32_t Channel)
Indicates whether compare register (TIMx_CCRx) preload is
enabled for the output channel.
TIMx: Timer instance
Channel: This parameter can be one of the following values:
LL_TIM_CHANNEL_CH1
LL_TIM_CHANNEL_CH2
LL_TIM_CHANNEL_CH3
LL_TIM_CHANNEL_CH4
Reference Manual to
LL API cross
reference:
CCMR1 OC1PE LL_TIM_OC_IsEnabledPreload
CCMR1 OC2PE LL_TIM_OC_IsEnabledPreload
CCMR2 OC3PE LL_TIM_OC_IsEnabledPreload
CCMR2 OC4PE LL_TIM_OC_IsEnabledPreload
LL_TIM_OC_EnableClear
__STATIC_INLINE void LL_TIM_OC_EnableClear
(TIM_TypeDef * TIMx, uint32_t Channel)
Enable clearing the output channel on an external event.
TIMx: Timer instance
Channel: This parameter can be one of the following values:
LL_TIM_CHANNEL_CH1
LL_TIM_CHANNEL_CH2