ST STM32F2

Correspondence between API registers and API
low-layer driver functions
UM1940
1308/1371
DocID028236 Rev 2
71.2 BUS
Table 26: Correspondence between BUS registers and BUS low-layer driver functions
Register
Field
Function
AHB1ENR
BKPSRAMEN
LL_AHB1_GRP1_DisableClock
LL_AHB1_GRP1_EnableClock
LL_AHB1_GRP1_IsEnabledClock
CRCEN
LL_AHB1_GRP1_DisableClock
LL_AHB1_GRP1_EnableClock
LL_AHB1_GRP1_IsEnabledClock
DMA1EN
LL_AHB1_GRP1_DisableClock
LL_AHB1_GRP1_EnableClock
LL_AHB1_GRP1_IsEnabledClock
DMA2EN
LL_AHB1_GRP1_DisableClock
LL_AHB1_GRP1_EnableClock
LL_AHB1_GRP1_IsEnabledClock
ETHMACEN
LL_AHB1_GRP1_DisableClock
LL_AHB1_GRP1_EnableClock
LL_AHB1_GRP1_IsEnabledClock
ETHMACPTPEN
LL_AHB1_GRP1_DisableClock
LL_AHB1_GRP1_EnableClock
LL_AHB1_GRP1_IsEnabledClock
ETHMACRXEN
LL_AHB1_GRP1_DisableClock
LL_AHB1_GRP1_EnableClock
LL_AHB1_GRP1_IsEnabledClock
ETHMACTXEN
LL_AHB1_GRP1_DisableClock
LL_AHB1_GRP1_EnableClock
LL_AHB1_GRP1_IsEnabledClock
GPIOAEN
LL_AHB1_GRP1_DisableClock
LL_AHB1_GRP1_EnableClock
LL_AHB1_GRP1_IsEnabledClock
GPIOBEN
LL_AHB1_GRP1_DisableClock
LL_AHB1_GRP1_EnableClock
LL_AHB1_GRP1_IsEnabledClock
GPIOCEN
LL_AHB1_GRP1_DisableClock
LL_AHB1_GRP1_EnableClock
LL_AHB1_GRP1_IsEnabledClock
GPIODEN
LL_AHB1_GRP1_DisableClock