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ST STM32F2 User Manual

ST STM32F2
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UM1940
Correspondence between API registers and API
low-layer driver functions
DocID028236 Rev 2
1319/1371
Register
Field
Function
LL_APB2_GRP1_EnableClockLowPower
USART6LPEN
LL_APB2_GRP1_DisableClockLowPower
LL_APB2_GRP1_EnableClockLowPower
APB2RSTR
ADCRST
LL_APB2_GRP1_ForceReset
LL_APB2_GRP1_ReleaseReset
SDIORST
LL_APB2_GRP1_ForceReset
LL_APB2_GRP1_ReleaseReset
SPI1RST
LL_APB2_GRP1_ForceReset
LL_APB2_GRP1_ReleaseReset
SYSCFGRST
LL_APB2_GRP1_ForceReset
LL_APB2_GRP1_ReleaseReset
TIM10RST
LL_APB2_GRP1_ForceReset
LL_APB2_GRP1_ReleaseReset
TIM11RST
LL_APB2_GRP1_ForceReset
LL_APB2_GRP1_ReleaseReset
TIM1RST
LL_APB2_GRP1_ForceReset
LL_APB2_GRP1_ReleaseReset
TIM8RST
LL_APB2_GRP1_ForceReset
LL_APB2_GRP1_ReleaseReset
TIM9RST
LL_APB2_GRP1_ForceReset
LL_APB2_GRP1_ReleaseReset
USART1RST
LL_APB2_GRP1_ForceReset
LL_APB2_GRP1_ReleaseReset
USART6RST
LL_APB2_GRP1_ForceReset
LL_APB2_GRP1_ReleaseReset
71.3 CORTEX
Table 27: Correspondence between CORTEX registers and CORTEX low-layer driver functions
Register
Field
Function
MPU_CTRL
ENABLE
LL_MPU_Disable
LL_MPU_Enable
LL_MPU_IsEnabled
MPU_RASR
AP
LL_MPU_ConfigRegion
B
LL_MPU_ConfigRegion
C
LL_MPU_ConfigRegion
ENABLE
LL_MPU_DisableRegion

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ST STM32F2 Specifications

General IconGeneral
BrandST
ModelSTM32F2
CategoryMicrocontrollers
LanguageEnglish

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