Overview of Low Layer drivers
3.2.2 Peripheral register-level configuration functions
On top of the peripheral initialization functions, the LL drivers offer a set of inline functions
for direct atomic register access. Their format is as follows:
__STATIC_INLINE return_type LL_PPP_Function (PPPx_TypeDef *PPPx, args)
The “Function” naming is defined depending to the action category:
Specific Interrupt, DMA request and status flags management:
Set/Get/Clear/Enable/Disable flags on interrupt and status registers
Table 19: Specific Interrupt, DMA request and status flags management
LL_PPP_{_CATEGORY}_ActionItem_BITNAME
LL_PPP{_CATEGORY}_IsItem_BITNAME_Action
LL_RCC_IsActiveFlag_LSIRDY
LL_RCC_IsActiveFlag_FWRST()
LL_ADC_ClearFlag_EOC(ADC1)
LL_DMA_ClearFlag_TCx(DMA_TypeDef* DMAx)
Table 20: Available function formats
LL_PPP_IsActiveFlag_BITNAME
LL_PPP_IsEnabledIT_BITNAME
LL_PPP_EnableDMAReq_BITNAME
LL_PPP_DisableDMAReq_BITNAME
LL_PPP_IsEnabledDMAReq_BITNAME
BITNAME refers to the peripheral register bit name as described in the product
line reference manual.
Peripheral clock activation/deactivation management: Enable/Disable/Reset a
peripheral clock
Table 21: Peripheral clock activation/deactivation management
LL_BUS_GRPx_ActionClock{Mode}
LL_AHB2_GRP1_EnableClock
(LL_AHB2_GRP1_PERIPH_GPIOA|LL_AHB2_GRP1_PERIPH_GP
IOB)
by LL_APB1_GRP1_EnableClockSleep
(LL_APB1_GRP1_PERIPH_DAC1)
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