ST STM32F2 User Manual

UM1940
LL RCC Generic Driver
DocID028236 Rev 2
1025/1371
LL_RCC_PLLP_DIV_2
LL_RCC_PLLP_DIV_4
LL_RCC_PLLP_DIV_6
LL_RCC_PLLP_DIV_8
Return values
None:
Notes
PLL Source and PLLM Divider can be written only when PLL,
PLLI2S are disabled
PLLN/PLLP can be written only when PLL is disabled
Reference Manual to
LL API cross
reference:
PLLCFGR PLLSRC LL_RCC_PLL_ConfigDomain_SYS
PLLCFGR PLLM LL_RCC_PLL_ConfigDomain_SYS
PLLCFGR PLLN LL_RCC_PLL_ConfigDomain_SYS
PLLCFGR PLLP LL_RCC_PLL_ConfigDomain_SYS
LL_RCC_PLL_ConfigDomain_48M
Function name
__STATIC_INLINE void LL_RCC_PLL_ConfigDomain_48M
(uint32_t Source, uint32_t PLLM, uint32_t PLLN, uint32_t
PLLQ)
Function description
Configure PLL used for 48Mhz domain clock.
Parameters
Source: This parameter can be one of the following values:
LL_RCC_PLLSOURCE_HSI
LL_RCC_PLLSOURCE_HSE
PLLM: This parameter can be one of the following values:
LL_RCC_PLLM_DIV_2
LL_RCC_PLLM_DIV_3
LL_RCC_PLLM_DIV_4
LL_RCC_PLLM_DIV_5
LL_RCC_PLLM_DIV_6
LL_RCC_PLLM_DIV_7
LL_RCC_PLLM_DIV_8
LL_RCC_PLLM_DIV_9
LL_RCC_PLLM_DIV_10
LL_RCC_PLLM_DIV_11
LL_RCC_PLLM_DIV_12
LL_RCC_PLLM_DIV_13
LL_RCC_PLLM_DIV_14
LL_RCC_PLLM_DIV_15
LL_RCC_PLLM_DIV_16
LL_RCC_PLLM_DIV_17
LL_RCC_PLLM_DIV_18
LL_RCC_PLLM_DIV_19
LL_RCC_PLLM_DIV_20
LL_RCC_PLLM_DIV_21
LL_RCC_PLLM_DIV_22
LL_RCC_PLLM_DIV_23
LL_RCC_PLLM_DIV_24
LL_RCC_PLLM_DIV_25
LL_RCC_PLLM_DIV_26
LL_RCC_PLLM_DIV_27
LL_RCC_PLLM_DIV_28

ST STM32F2 Specifications

General

Brand	ST
Model	STM32F2
Category	Microcontrollers
Language	English