ETH DMA overflow
ETH_DMA_OVERFLOW_RXFIFOCOUNTER
Overflow bit for FIFO overflow
counter
ETH_DMA_OVERFLOW_MISSEDFRAMECOUNTER
Overflow bit for missed frame
counter
ETH DMA receive process state
ETH_DMA_RECEIVEPROCESS_STOPPED
Stopped - Reset or Stop Rx Command
issued
ETH_DMA_RECEIVEPROCESS_FETCHING
Running - fetching the Rx descriptor
ETH_DMA_RECEIVEPROCESS_WAITING
Running - waiting for packet
ETH_DMA_RECEIVEPROCESS_SUSPENDED
Suspended - Rx Descriptor unavailable
ETH_DMA_RECEIVEPROCESS_CLOSING
Running - closing descriptor
ETH_DMA_RECEIVEPROCESS_QUEUING
Running - queuing the receive frame
into host memory
ETH DMA RX Descriptor
OWN bit: descriptor is owned by DMA
engine
DA Filter Fail for the rx frame
Receive descriptor frame length
Error summary: OR of the following
bits: DE || OE || IPC || LC || RWT || RE
|| CE
Descriptor error: no more descriptors
for receive frame
SA Filter Fail for the received frame
Frame size not matching with length
field
Overflow Error: Frame was damaged
due to buffer overflow
VLAN Tag: received frame is a VLAN
frame
First descriptor of the frame
Last descriptor of the frame
IPC Checksum Error: Rx Ipv4 header
checksum error
Late collision occurred during
reception
Frame type - Ethernet, otherwise 802.3
Receive Watchdog Timeout: watchdog
timer expired during reception