ST STM32F2 User Manual

UM1940
LL SYSTEM Generic Driver
DocID028236 Rev 2
1159/1371
LL_FLASH_EnableDataCacheReset
Function name
__STATIC_INLINE void LL_FLASH_EnableDataCacheReset
(void )
Function description
Enable Data cache reset.
Return values
None:
Notes
bit can be written only when the data cache is disabled
Reference Manual to
LL API cross
reference:
FLASH_ACR DCRST LL_FLASH_EnableDataCacheReset
LL_FLASH_DisableDataCacheReset
Function name
__STATIC_INLINE void LL_FLASH_DisableDataCacheReset
(void )
Function description
Disable Data cache reset.
Return values
None:
Reference Manual to
LL API cross
reference:
FLASH_ACR DCRST LL_FLASH_DisableDataCacheReset
66.2 SYSTEM Firmware driver defines
66.2.1 SYSTEM
DBGMCU APB1 GRP1 STOP IP
LL_DBGMCU_APB1_GRP1_TIM2_STOP
TIM2 counter stopped when core is halted
LL_DBGMCU_APB1_GRP1_TIM3_STOP
TIM3 counter stopped when core is halted
LL_DBGMCU_APB1_GRP1_TIM4_STOP
TIM4 counter stopped when core is halted
LL_DBGMCU_APB1_GRP1_TIM5_STOP
TIM5 counter stopped when core is halted
LL_DBGMCU_APB1_GRP1_TIM6_STOP
TIM6 counter stopped when core is halted
LL_DBGMCU_APB1_GRP1_TIM7_STOP
TIM7 counter stopped when core is halted
LL_DBGMCU_APB1_GRP1_TIM12_STOP
TIM12 counter stopped when core is halted
LL_DBGMCU_APB1_GRP1_TIM13_STOP
TIM13 counter stopped when core is halted
LL_DBGMCU_APB1_GRP1_TIM14_STOP
TIM14 counter stopped when core is halted
LL_DBGMCU_APB1_GRP1_RTC_STOP
RTC counter stopped when core is halted
LL_DBGMCU_APB1_GRP1_WWDG_STOP
Debug Window Watchdog stopped when
Core is halted
LL_DBGMCU_APB1_GRP1_IWDG_STOP
Debug Independent Watchdog stopped
when Core is halted
LL_DBGMCU_APB1_GRP1_I2C1_STOP
I2C1 SMBUS timeout mode stopped when
Core is halted
LL_DBGMCU_APB1_GRP1_I2C2_STOP
I2C2 SMBUS timeout mode stopped when
Core is halted

ST STM32F2 Specifications

General

Brand	ST
Model	STM32F2
Category	Microcontrollers
Language	English