ST STM32F2 User Manual

LL TIM Generic Driver
UM1940
1232/1371
DocID028236 Rev 2
when the counter is counting up
LL_TIM_COUNTERMODE_CENTER_UP_DOWN
The counter counts up and down
alternatively. Output compare interrupt
flags of output channels are set only
when the counter is counting up or
down.
DMA Burst Base Address
LL_TIM_DMABURST_BASEADDR_CR1
TIMx_CR1 register is the DMA base
address for DMA burst
LL_TIM_DMABURST_BASEADDR_CR2
TIMx_CR2 register is the DMA base
address for DMA burst
LL_TIM_DMABURST_BASEADDR_SMCR
TIMx_SMCR register is the DMA base
address for DMA burst
LL_TIM_DMABURST_BASEADDR_DIER
TIMx_DIER register is the DMA base
address for DMA burst
LL_TIM_DMABURST_BASEADDR_SR
TIMx_SR register is the DMA base address
for DMA burst
LL_TIM_DMABURST_BASEADDR_EGR
TIMx_EGR register is the DMA base
address for DMA burst
LL_TIM_DMABURST_BASEADDR_CCMR1
TIMx_CCMR1 register is the DMA base
address for DMA burst
LL_TIM_DMABURST_BASEADDR_CCMR2
TIMx_CCMR2 register is the DMA base
address for DMA burst
LL_TIM_DMABURST_BASEADDR_CCER
TIMx_CCER register is the DMA base
address for DMA burst
LL_TIM_DMABURST_BASEADDR_CNT
TIMx_CNT register is the DMA base
address for DMA burst
LL_TIM_DMABURST_BASEADDR_PSC
TIMx_PSC register is the DMA base
address for DMA burst
LL_TIM_DMABURST_BASEADDR_ARR
TIMx_ARR register is the DMA base
address for DMA burst
LL_TIM_DMABURST_BASEADDR_RCR
TIMx_RCR register is the DMA base
address for DMA burst
LL_TIM_DMABURST_BASEADDR_CCR1
TIMx_CCR1 register is the DMA base
address for DMA burst
LL_TIM_DMABURST_BASEADDR_CCR2
TIMx_CCR2 register is the DMA base
address for DMA burst
LL_TIM_DMABURST_BASEADDR_CCR3
TIMx_CCR3 register is the DMA base
address for DMA burst
LL_TIM_DMABURST_BASEADDR_CCR4
TIMx_CCR4 register is the DMA base
address for DMA burst
LL_TIM_DMABURST_BASEADDR_BDTR
TIMx_BDTR register is the DMA base
address for DMA burst
LL_TIM_DMABURST_BASEADDR_OR

ST STM32F2 Specifications

General

Brand	ST
Model	STM32F2
Category	Microcontrollers
Language	English