Capture/Compare 1 overcapture flag
Capture/Compare 2 overcapture flag
Capture/Compare 3 overcapture flag
Capture/Compare 4 overcapture flag
Input Configuration Prescaler
No prescaler, capture is done each time an edge is detected on
the capture input
Capture is done once every 2 events
Capture is done once every 4 events
Capture is done once every 8 events
Input Configuration Filter
No filter, sampling is done at fDTS
LL_TIM_IC_FILTER_FDIV1_N2
LL_TIM_IC_FILTER_FDIV1_N4
LL_TIM_IC_FILTER_FDIV1_N8
LL_TIM_IC_FILTER_FDIV2_N6
LL_TIM_IC_FILTER_FDIV2_N8
LL_TIM_IC_FILTER_FDIV4_N6
LL_TIM_IC_FILTER_FDIV4_N8
LL_TIM_IC_FILTER_FDIV8_N6
LL_TIM_IC_FILTER_FDIV8_N8
LL_TIM_IC_FILTER_FDIV16_N5
LL_TIM_IC_FILTER_FDIV16_N6
LL_TIM_IC_FILTER_FDIV16_N8
LL_TIM_IC_FILTER_FDIV32_N5
LL_TIM_IC_FILTER_FDIV32_N6
LL_TIM_IC_FILTER_FDIV32_N8
Input Configuration Polarity
LL_TIM_IC_POLARITY_RISING
The circuit is sensitive to TIxFP1 rising edge,
TIxFP1 is not inverted
LL_TIM_IC_POLARITY_FALLING
The circuit is sensitive to TIxFP1 falling edge,
TIxFP1 is inverted
LL_TIM_IC_POLARITY_BOTHEDGE
The circuit is sensitive to both TIxFP1 rising and
falling edges, TIxFP1 is not inverted
IT Defines
Capture/compare 1 interrupt enable
Capture/compare 2 interrupt enable