ARM ARM7TDMI - Page 193

AC and DC Parameters
ARM DDI 0210C Copyright © 2001, 2004 ARM Limited. All rights reserved. 7-21
T
brks
Set up time of BREAKPT to MCLKr Minimum Figure 7-13 on page 7-12
T
bsch
TCK high period Minimum Figure 7-18 on page 7-16
T
bscl
TCK low period Minimum Figure 7-18 on page 7-16
T
bsdd
TCK to data output valid Maximum Figure 7-18 on page 7-16
T
bsdh
Data output hold time from TCK Minimum Figure 7-18 on page 7-16
T
bse
Output enable time Maximum Figure 7-20 on
page 7-17Figure 7-21 on
page 7-18
T
bsih
TDI, TMS hold from TCKr Minimum Figure 7-18 on page 7-16
T
bsis
TDI, TMS setup to TCKr Minimum Figure 7-18 on page 7-16
T
bsod
TCKf to TDO valid Maximum Figure 7-18 on page 7-16
T
bsoh
TDO hold time from TCKf Minimum Figure 7-18 on page 7-16
T
bsr
nTRST reset period Minimum Figure 7-19 on page 7-17
T
bssh
I/O signal setup from TCKr Minimum Figure 7-18 on page 7-16
T
bsss
I/O signal setup to TCKr, Minimum Figure 7-18 on page 7-16
T
bsz
Output disable time Maximum Figure 7-20 on
page 7-17Figure 7-21 on
page 7-18
T
bylh
BL[3:0] hold time from MCLKf Minimum Figure 7-4 on
page 7-6Figure 7-8 on
page 7-9
T
byls
BL[3:0] set up to from MCLKr Minimum Figure 7-4 on
page 7-6Figure 7-8 on
page 7-9
T
cdel
MCLK to ECLK delay Maximum Figure 7-1 on page 7-3
T
clkbs
TCK to boundary scan clocks Maximum -
T
commd
MCLKr to COMMRX, COMMTX valid Maximum Figure 7-14 on page 7-13
Table 7-23 AC timing parameters used in this chapter (continued)
Symbol Parameter
Parameter
type
Figure cross
reference