Signal and Transistor Descriptions
A-10 Copyright © 2001, 2004 ARM Limited. All rights reserved. ARM DDI 0210C
nRESET
Not reset
IC Used to start the processor from a known address.
A LOW level causes the instruction being executed to terminate abnormally.
This signal must be held LOW for at least two clock cycles, with nWAIT
held HIGH.
When LOW the processor performs internal cycles with the address
incrementing from the point where reset was activated. The address
overflows to zero if nRESET is held beyond the maximum address limit.
When HIGH for at least one clock cycle, the processor restarts from address
0.
nRW
Not read, write
O When the processor is performing a read cycle, this is LOW.
This is one of the signals controlled by APE, ALE, and ABE.
nTDOEN
Not TDO enable
O When serial data is being driven out on TDO this is LOW.
Usually used as an output enable for a TDO pin in a packaged part.
nTRANS
Not memory translate
O When the processor is in User mode, this is LOW.
It can be used either to tell the memory management system when address
translation is turned on, or as an indicator of non-User mode activity.
This is one of the signals controlled by APE, ALE, and ABE.
nTRST
Not test reset
IC Reset signal for the boundary-scan logic. This pin must be pulsed or driven
LOW to achieve normal device operation, in addition to the normal device
reset, nRESET.
See Chapter 5 Debug Interface.
nWAIT
Not wait
IC When LOW the processor extends an access over a number of cycles of
MCLK, which is useful for accessing slow memory or peripherals.
Internally, nWAIT is logically ANDed with MCLK and must only change
when MCLK is LOW.
If nWAIT is not used it must be tied HIGH.
PCLKBS
Boundary scan
update clock
O This is used by an external boundary-scan chain as the update clock.
This must be left unconnected, if an external boundary-scan chain is not
connected.
RANGEOUT0
EmbeddedICE-RT RANGEOUT0
O When the EmbeddedICE-RT watchpoint unit 0 has matched the conditions
currently present on the address, data, and control buses, then this is HIGH.
This signal is independent of the state of the watchpoint enable control bit.
RANGEOUT0 changes when ECLK is LOW.
Table A-3 Signal descriptions (continued)
Name Type Description
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