Glossary
Glossary-4 Copyright © 2001, 2004 ARM Limited. All rights reserved. ARM DDI 0210C
Program Status Register
Contains some information about the current program and some information about the
current processor. Also referred to as Processor Status Register.
Also referred to as Current PSR (CPSR), to emphasize the distinction between it and
the Saved PSR (SPSR). The SPSR holds the value the PSR had when the current
function was called, and which will be restored when control is returned.
PSR See Program Status Register.
RAZ Read as zero.
Reduced Instruction Set Computer
A type of microprocessor that recognizes a lower number of instructions in comparison
with a Complex Instruction Set Computer. The advantages of RISC architectures are:
• they can execute their instructions very fast because the instructions are so simple
• they require fewer transistors, this makes them cheaper to produce and more
power efficient.
See also Complex Instruction Set Computer.
RISC See Reduced Instruction Set Computer
Saved Program Status Register
The Saved Program Status Register which is associated with the current processor mode
and is undefined if there is no such Saved Program Status Register, as in User mode or
System mode.
See also Program Status Register.
SBO See Should Be One fields.
SBZ See Should Be Zero fields.
Should Be One fields
Should be written as one (or all ones for bit fields) by software. Values other than one
produces unpredictable results.
See also Should Be Zero fields.
Should Be Zero fields
Should be written as zero (or all 0s for bit fields) by software. Values other than zero
produce unpredictable results.
See also Should Be One fields.
Software Interrupt Instruction
This instruction (SWI) enters Supervisor mode to request a particular operating system
function.
To Next Page
Loading...
