Glossary
ARM DDI 0210C Copyright © 2001, 2004 ARM Limited. All rights reserved. Glossary-5
SPSR See Saved Program Status Register.
Stack pointer A register or variable pointing to the top of a stack. If the stack is full stack the SP points
to the most recently pushed item, else if the stack is empty, the SP points to the first
empty location, where the next item will be pushed.
Status registers See Program Status Register.
SP See Stack pointer
SWI See Software Interrupt Instruction.
TAP See Test access port.
Test Access Port The collection of four mandatory and one optional terminals that form the input/output
and control interface to a JTAG boundary-scan architecture. The mandatory terminals
are TDI, TDO, TMS, and TCK. The optional terminal is nTRST.
Thumb instruction A halfword which specifies an operation for an ARM processor in Thumb state to
perform. Thumb instructions must be halfword-aligned.
Thumb state A processor that is executing Thumb (16-bit) instructions is operating in Thumb state.
UND See Undefined.
Undefined Indicates an instruction that generates an undefined instruction trap.
UNP See Unpredictable
Unpredictable Means the result of an instruction cannot be relied upon. Unpredictable instructions
must not halt or hang the processor, or any parts of the system.
Unpredictable fields Do not contain valid data, and a value can vary from moment to moment, instruction to
instruction, and implementation to implementation.
Watchpoint A location in the image that is monitored. If the value stored there changes, the debugger
halts execution of the image.
See also Breakpoint.
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