List of Tables
ARM DDI 0210C Copyright © 2001, 2004 ARM Limited. All rights reserved. ix
Table 7-22 APE address control timing parameters .................................................................. 7-19
Table 7-23 AC timing parameters used in this chapter ............................................................. 7-20
Table A-1 Transistor gate dimensions of the output driver for a 0.18µm process ..................... A-2
Table A-2 Signal types ............................................................................................................... A-3
Table A-3 Signal descriptions .................................................................................................... A-4
Table B-1 Public instructions ..................................................................................................... B-9
Table B-2 Scan chain number allocation ................................................................................. B-16
Table B-3 Scan chain 0 cells ................................................................................................... B-35
Table B-4 Scan chain 1 cells ................................................................................................... B-40
Table B-5 Function and mapping of EmbeddedICE-RT registers ........................................... B-42
Table B-6 MAS[1:0] signal encoding ....................................................................................... B-45
Table B-7 Debug control register bit assignments ................................................................... B-51
Table B-8 Interrupt signal control ............................................................................................. B-52
Table B-9 Debug status register bit assignments .................................................................... B-54