Chapter 4 INTERFACE SETTINGS
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[10] MODE9 (16Lane) (No Split)
Without splitting the screen, it is output according to [Pixel Assignment of each Lane] from each output
board.
This example is a case where the resolution is 4096 × 2048, the dot clock frequency is 1184 MHz and the
output bit depth is 10 bits.
[Assignment of each Lane]
Lane 1-16