1
I>1 Start I>2 Start I>3 Start
I>4 Start I>5 Start I>6 Start
I2>1 Start I2>2 Start I2>3 Start
I2>4 Start IN1>1 Start IN1>2 Start
IN1>3 Start IN1>4 Start IN2>1 Start
IN2>2 Start IN2>3 Start IN2>4 Start
ISEF>1 Start ISEF>2 Start ISEF>3 Start
ISEF>4 Start V<1 Start V<2 Start
V<3 Start V>1 Start V>2 Start
V>3 Start VN>1 Start VN>2 Start
VN>3 Start V2> Start BrokenLine Start
Power>1 3PhStart Power>1 A Start Power>1 B Start
Power>1 C Start Power>2 3PhStart Power>2 A Start
Power>2 B Start Power>2 C Start Power<1 3PhStart
Power<1 A Start Power<1 B Start Power<1 C Start
Power<2 3PhStart Power<2 A Start Power<2 B Start
Power<2 C Start SensP1 Start A SensP2 Start A
Stg1 f+t Sta Stg1 df/dt+t Sta Stg1 f+Df/Dt Sta
Stg2 f+t Sta Stg2 df/dt+t Sta Stg2 f+Df/Dt Sta
Stg3 f+t Sta Stg3 df/dt+t Sta Stg3 f+Df/Dt Sta
Stg4 f+t Sta Stg4 df/dt+t Sta Stg4 f+Df/Dt Sta
Stg5 f+t Sta Stg5 df/dt+t Sta Stg5 f+Df/Dt Sta
Stg6 f+t Sta Stg6 df/dt+t Sta Stg6 f+Df/Dt Sta
Stg7 f+t Sta Stg7 df/dt+t Sta Stg7 f+Df/Dt Sta
Stg8 f+t Sta Stg8 df/dt+t Sta Stg8 f+Df/Dt Sta
Stg9 f+t Sta Stg9 df/dt+t Sta Stg9 f+Df/Dt Sta
dv/dt1 StartA/AB dv/dt1 StartB/BC
Any Start
dv/dt1 StartC/CA
dv/dt1 Start dv/dt2 StartA/AB dv/dt2 StartB/BC
dv/dt2 StartC/CA dv/dt2 Start dv/dt3 StartA/AB
dv/dt3 StartB/BC dv/dt3 StartC/CA dv/dt3 Start
dv/dt4 StartA/AB dv/dt4 StartB/BC dv/dt4 StartC/CA
dv/dt4 Start
V02000
Key:
External DDB Signal
&AND gate
O
R gate
1